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 MC74LCX245 Low-Voltage CMOS Octal Transceiver
With 5 V-Tolerant Inputs and Outputs (3-State, Inverting)
http://onsemi.com
The MC74LCX245 is a high performance, non-inverting octal transceiver operating from a 2.3 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX245 inputs to be safely driven from 5 V devices. The MC74LCX245 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Current drive capability is 24 mA at both A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bi-directional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.
MARKING DIAGRAMS
20 20 1
LCX245 AWLYYWW
1
SO-20 DW SUFFIX CASE 751D
20 20 1
* * * * * * * *
Designed for 2.3 to 3.6 V VCC Operation 5 V Tolerant -- Interface Capability With 5 V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0 V LVTTL Compatible LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (10 A) Substantially Reduces System Power Requirements Latchup Performance Exceeds 500 mA
20
TSSOP-20 DT SUFFIX CASE 948E
LCX 245 ALYW
1
20
74LCX245
1
AWLYYWW
1
SO EIAJ-20 M SUFFIX CASE 967 A L , WL Y, YY W, WW
* * ESD Performance: Human Body Model >2000 V; Machine Model
>200 V
= Assembly Location = Wafer Lot = Year = Work Week
ORDERING INFORMATION
Device MC74LCX245DW MC74LCX245DWR2 MC74LCX245DT MC74LCX245DTEL MC74LCX245DTR2 MC74LCX245M MC74LCX245MEL Package SO-20 SO-20 TSSOP-20 TSSOP-20 TSSOP-20 SO EIAJ-20 SO EIAJ-20 Shipping 38 Units/Rail 1000 Units/Reel 75 Units/Rail 2000 Units/Reel 2500 Units/Reel 40 Units/Rail 2000 Units/Reel
(c) Semiconductor Components Industries, LLC, 2000
1
December, 2000 - Rev. 4
Publication Order Number: MC74LCX245/D
MC74LCX245
VCC 20
OE 19
B0 18
B1 17
B2 16
B3 15
B4 14
B5 13
B6 12
B7 11
OE 19 T/R 1 2 18
A0
B0
1 T/R
2 A0
3 A1
4 A2
5 A3
6 A4
7 A5
8 A6
9 A7
10 GND
A1
3 17
B1
Figure 1. Pinout (Top View)
A2
4 16
B2
PIN NAMES
PINS OE T/R A0-A7 B0-B7 FUNCTION Output Enable Input Transmit/Receive Input Side A 3-State Inputs or 3-State Outputs Side B 3-State Inputs or 3-StateOutputs
A3
5 15
B3
A4
6 14
B4
A5
7 13 B5
TRUTH TABLE
INPUTS OE L L H T/R L H X OPERATING MODE Non-Inverting B Data to A Bus A Data to B Bus Z
A6
8 12
B6
A7
9 11
B7
H = High Voltage Level L = Low Voltage Level Z = High Impedance State X = High or Low Voltage Level and Transitions are Acceptable For ICC reasons, Do Not Float Inputs
Figure 2. Logic Diagram
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2
MC74LCX245
ABSOLUTE MAXIMUM RATINGS*
Symbol VCC VI VO Parameter DC Supply Voltage DC Input Voltage DC Output Voltage Value -0.5 to +7.0 -0.5 VI +7.0 -0.5 VO +7.0 -0.5 VO VCC + 0.5 IIK IOK DC Input Diode Current DC Output Diode Current -50 -50 +50 IO ICC IGND TSTG DC Output Source/Sink Current DC Supply Current Per Supply Pin DC Ground Current Per Ground Pin Storage Temperature Range 50 100 100 -65 to +150 Output in 3-State Output in HIGH or LOW State (Note 1.) VI< GND VO < GND VO > VCC Condition Unit V V V V mA mA mA mA mA mA C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not implied. 1. IO absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO IOH Supply Voltage Input Voltage Output Voltage HIGH Level Output Current (HIGH or LOW State) (3-State) VCC = 3.0 V - 3.6 V VCC = 2.7 V - 3.0 V VCC = 2.3 V - 2.7 V VCC = 3.0 V - 3.6 V VCC = 2.7 V - 3.0 V VCC = 2.3 V - 2.7 V -40 0 Parameter Operating Data Retention Only Min 2.0 1.5 0 0 0 Typ 2.5, 3.3 2.5, 3.3 Max 3.6 3.6 5.5 VCC 5.5 - 24 - 12 -8 + 24 + 12 +8 +85 10 Unit V V V mA
IOL
LOW Level Output Current
mA
TA t/V
Operating Free-Air Temperature Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V
C ns/V
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3
MC74LCX245
DC ELECTRICAL CHARACTERISTICS
TA = -40C to +85C Symbol VIH Characteristic HIGH Level Input Voltage ( g (Note 2.) ) Condition 2.3 V VCC 2.7 V 2.7 V VCC 3.6 V VIL LOW Level Input Voltage (Note 2.) g( ) 2.3 V VCC 2.7 V 2.7 V VCC 3.6 V VOH HIGH Level Output Voltage g 2.3 V VCC 3.6 V; IOL = 100 A VCC = 2.3 V; IOH = -8 mA VCC = 2.7 V; IOH = -12 mA VCC = 3.0 V; IOH = -18 mA VCC = 3.0 V; IOH = -24 mA VOL LOW Level Output Voltage g 2.3 V VCC 3.6 V; IOL = 100 A VCC = 2.3 V; IOL= 8 mA VCC = 2.7 V; IOL= 12 mA VCC = 3.0 V; IOL = 16 mA VCC = 3.0 V; IOL = 24 mA II IOZ IOFF ICC ICC Input Leakage Current 3-State Output Current Power-Off Leakage Current Quiescent Supply Current y 2.3 V VCC 3.6 V; 0 V VI 5.5 V 2.3 VCC 3.6 V; 0V VO 5.5 V; VI = VIH or V IL VCC = 0 V; VI or VO = 5.5 V 2.3 VCC 3.6 V; VI = GND or VCC 2.3 VCC 3.6 V; 3.6 VI or VO 5.5 V Increase in ICC per Input 2.3 VCC 3.6 V; VIH = VCC - 0.6 V VCC - 0.2 1.8 2.2 2.4 2.2 0.2 0.6 0.4 0.4 0.55 5 5 10 10 10 500 A A A A A V Min 1.7 2.0 0.7 0.8 V V Max Unit V
2. These values of VI are used to test DC electrical characteristics only.
AC CHARACTERISTICS tR = tF = 2.5 ns; RL = 500
Limits TA = -40C to +85C VCC = 3.3 V 0.3 V CL = 50 pF Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tOSHL tOSLH Parameter Propagation Delay Input to Output Output Enable Time to High and Low Level Output Disable Time From High and Low Level Output-to-Output Skew (Note 3.) Waveform 1 2 2 Min 1.5 1.5 1.5 1.5 1.5 1.5 Max 7.0 7.0 8.5 8.5 7.5 7.5 1.0 1.0 VCC = 2.7 V CL = 50 pF Min 1.5 1.5 1.5 1.5 1.5 1.5 Max 8.0 8.0 9.5 9.5 8.5 8.5 VCC = 2.5 V 0.2 V CL = 30 pF Min 1.5 1.5 1.5 1.5 1.5 1.5 Max 8.4 8.4 10.5 10.5 9.0 9.0 ns ns ns ns Unit
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design.
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4
MC74LCX245
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25C Symbol VOLP VOLV Characteristic Dynamic LOW Peak Voltage (Note 4.) Dynamic LOW Valley Voltage (Note 4.) Condition VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V Min Typ 0.8 0.6 -0.8 -0.6 Max Unit V V V V
4. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH-to-LOW or LOW-to-HIGH. The remaining output is measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol CIN CI/O CPD Parameter Input Capacitance Input/Output Capacitance Power Dissipation Capacitance Condition VCC = 3.3 V, VI = 0 V or VCC VCC = 3.3 V, VI = 0 V or VCC 10 MHz, VCC = 3.3 V, VI = 0 V or VCC Typical 7 8 25 Unit pF pF pF
OE, T/R VCC An, Bn Vmi tPLH Vmo Vmi 0V tPHL VOH Bn, An Vmo VOL An, Bn Vmo tPZL tPLZ An, Bn tPZH Vmo Vmi tPHZ Vmi
VCC 0V VOH VHZ
VLZ VOL
WAVEFORM 1 - PROPAGATION DELAYS tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
WAVEFORM 2 - OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
VCC Symbol Vmi Vmo VHZ VLZ 3.3 V 0.3 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V 2.5 V 0.2 V VCC/2 VCC/2 VOL + 0.15 V VOH - 015 V
Figure 3. AC Waveforms
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5
MC74LCX245
VCC 6V OPEN GND
PULSE GENERATOR RT
DUT CL
R1 RL
TEST tPLH, tPHL tPZL, tPLZ Open Collector/Drain tPLH and tPHL tPZH, tPHZ CL = CL = RL = RT =
SWITCH Open 6 V at VCC = 3.3 0.3 V 6 V at VCC = 2.5 0.2 V 6V GND
50 pF at VCC = 3.3 0.3 V or equivalent (includes jig and probe capacitance) 30 pF at VCC = 2.5 0.2 V or equivalent (includes jig and probe capacitance) R1 = 500 or equivalent ZOUT of pulse generator (typically 50 )
Figure 4. Test Circuit
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6
MC74LCX245
PACKAGE DIMENSIONS
SO-20 DW SUFFIX CASE 751D-05 ISSUE F
D A
11 X 45 _
q
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_
H
M
B
M
20
10X
0.25
E
1
10
20X
B 0.25
M
B TA
S
B
S
A
SEATING PLANE
h
18X
e
A1
T
C
TSSOP-20 DT SUFFIX CASE 948E-02 ISSUE A
20X
K REF
M
L
0.15 (0.006) T U
S
0.10 (0.004)
TU
S
V
S
B L
PIN 1 IDENT 1 10
J J1
-U-
N 0.15 (0.006) T U
S
A -V- N F
C D 0.100 (0.004) -T- SEATING
PLANE
G
H
DETAIL E
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7
IIII IIII IIII
SECTION N-N M DETAIL E
2X
L/2
20
11
K K1
0.25 (0.010)
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
-W-
MC74LCX245
PACKAGE DIMENSIONS
SO EIAJ-20 M SUFFIX CASE 967-01 ISSUE O
20
11
LE Q1 M_ L DETAIL P
E HE
1
10
Z D e VIEW P A
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --0.81 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.032
c
b 0.13 (0.005)
M
A1 0.10 (0.004)
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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MC74LCX245/D


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